Plan for the SP0600 Project - Stage 1

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Introduction:

Hello Everyone, In this blog I am going to discuss the stage 1 about my project for SP0600. The Stage 1 is about the planning of the project. In this project we have to create a proof-of-concept tool to build functions with the use of automatic vectorization.

Automatic vectorization have three major implementation of SIMD instructions for AArch64, Advanced SIMD, SVE and SVE2. Some modern gcc compiler have option to choose from one of these implementations at runtime using the function ifunc. However, ifunc requires additional set up and configurations by software developer before use. To learn more about automatic vectorization please visit this link. To learn about ifunc please visit this link. For more brief detail about the ASIMD, SVE and SVE2 please read my previous blog on this link.

The primary focus of this project is to eliminate all the setup done by software developer and automate the process by writing a tool. This tool will enable to developer to build three versions of function and at runtime compiler will choose one from them and generate a single output file.

This tool will be fully functional on AArch64 system, for this project, I am going to use israel.cdot.systems which is provided by college. However, israel is not compatible with SVE and SVE2, to solve that problem I am going to use qemu-aarch64  emulation tool.

Plan:

Before discussing the plan I would like to mention some requirements and limitations of the tool. First of all tool will accept only two arguments: main.c and function.c where function.c will contain only single function which will get vectorized.

There are following limitations of the tool:

  • The tool will only work on the aarch64 system.
  • Only three SIMD implementations are at focus: ASIMD, SVE and SVE2.
  • Two arguments are acceptable which are listed in above paragraph
  • only second argument will be built three times (function.c). 
  • second argument file will may contain only single function. 

Language:

For writing ifunc function I will use the c language with the resolver implemented. I will create a intermediated file "ifunc.c" in c language.

But the tool will be written in Python. I think I will be most comfortable with python to write the main tool which will use to create the ifunc.c file with other .c and header files.

I will use visual studio to write the code for c language. I may use PyCharm to write the code in python. I will use these IDEs because I am familiar with them and confident in writing the code for both the languages in their specific IDEs. Moreover, for writing this tool, I will explore several libraries of python.

Procedure:

 I am going to divide the whole workflow into several parts. For the implementation of the tool it will be done in following steps.
  • Firstly, tool will clone the second argument file (function.c) into three files each for ASIMD, SVE, SVE2. 
  • Then in each of the files (function.c), tool will have to rename the functions respectively so that each function differs from each other. Best way to do so will be to add a suffix into the name of the function.
  • The third step will be to create the ifunc.c file. I will fill this file with template where I can replace the name of functions with the argument.
  • Then I will have to add the header files to the generated ifunc.c file. But first I have to create a ifunc.h header file to keep the prototype of the three functions.
  • After creating all the files I have to build them. I will build three files for three functions according to arguments for ASIMD, SVE and SVE2. To learn more about building these implementation please read my previous blog on this link.
  • Then I have to finally build all three functions along with ifunc file so that compiler automatically chooses a version for auto-vectorization.
By following the listed procedure, I will be able to create a tool to automate the process of ifunc function. 

For testing the tool my I was given with set of test file in the git repository. The code is available at https://github.com/ctyler/spo600-fall2022-project-test-code to test the tool.

My tool will be a open source project and I am going to release it under GNU General public License.

I am going to host my source code along with working tool on the github repository. I will provide the link to repository in upcoming stages. 

Challenges:

I am expecting some challenges while building this software. My first challenge will be to rename the functions and add those to ifunc c file and header file because I have very minimum idea how I am going to accomplish that. My other challenge will be to test the code at israel (aarch64) systems because given test files use images and to view images on a ssh shell it is require to initiate -X version. I tried that before but I was not able to find the solution to that yet but I am still searching on it. I think also debugging in python will also be difficult especially for ifunc function. But I am excited to work on this project and overcome these challenges to build the successful tool. 

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